Shaahin Angizi

Zhou, Ranyang, & Ahmed, Sabbir, & Rakin, Adnan Siraj, & Angizi, Shaahin (2023). DNN-Defender: An in-DRAM Deep Neural Network Defense Mechanism for Adversarial Weight Attack. arXiv preprint arXiv:2305.08034,

Roohi, Arman, & Tabrizchi, Sepehr, & Morsali, Mehrdad, & Pan, David Z, & Angizi, Shaahin (2023). PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,

Angizi, Shaahin, & Tabrizchi, Sepehr, & Pan, David Z, & Roohi, Arman (2023). PISA: A Non-Volatile Processing-In-Sensor Accelerator for Imaging Systems. IEEE Transactions on Emerging Topics in Computing,

Nazzal, Mahmoud, & Khreishah, Abdallah, & Lee, Joyoung, & Angizi, Shaahin (2023). Semi-decentralized Inference in Heterogeneous Graph Neural Networks for Traffic Demand Forecasting: An Edge-Computing Approach. arXiv preprint arXiv:2303.00524,

Angizi, Shaahin, & Morsali, Mehrdad, & Tabrizchi, Sepehr, & Roohi, Arman (2022). A Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks. arXiv preprint arXiv:2210.06698,

Alali, Mohammed H, & Roohi, Arman, & Angizi, Shaahin, & Deogun, Jitender S (2022). Enabling Intelligent IoTs for Histopathology Image Analysis Using Convolutional Neural Networks. Micromachines, 13(8), 1364.

Sheikhfaal, Shadi, & Angizi, Shaahin, & DeMara, Ronald F (2022). Energy-Efficient Recurrent Neural Network with MRAM-based Probabilistic Activation Functions. IEEE Transactions on Emerging Topics in Computing,

Zhou, Ranyang, & Tabrizchi, Sepehr, & Roohi, Arman, & Angizi, Shaahin (2022). LT-PIM: An LUT-based processing-in-DRAM architecture with RowHammer self-tracking. IEEE Computer Architecture Letters, 21(2), 141--144.

Abedin, Minhaz, & Roohi, Arman, & Liehr, Maximilian, & Cady, Nathaniel, & Angizi, Shaahin (2022). MR-PIPA: An Integrated Multi-level RRAM (HfO x) based Processing-In-Pixel Accelerator. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits,

Abedin, Minhaz, & Roohi, Arman, & Liehr, Maximilian, & Cady, Nathaniel, & Angizi, Shaahin (2022). MR-PIPA: An integrated multilevel RRAM (HfO x)-based processing-in-pixel accelerator. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 8(2), 59--67.

Angizi, Shaahin, & Fan, Deliang, & Marshall, Andrew, & Dowben, Peter A (2022). Nonvolatile Memory Based Architectures Using Magnetoelectric FETs. Advances in Semiconductor Technologies: Selected Topics Beyond Conventional CMOS, 79--92.

Tabrizchi, Sepehr, & Angizi, Shaahin, & Roohi, Arman (2022). Ocelli: Efficient Processing-in-Pixel Array Enabling Edge Inference of Ternary Neural Networks. Journal of Low Power Electronics and Applications, 12(4), 57.

Angizi, Shaahin, & Tabrizchi, Sepehr, & Roohi, Arman (2022). Pisa: A binary-weight processing-in-sensor accelerator for edge image processing. arXiv preprint arXiv:2202.09035,

Danehdaran, Fahimeh, & Angizi, Shaahin, & Bagherian Khosroshahy, Milad, & Navi, Keivan, & Bagherzadeh, Nader (2021). A combined three and five inputs majority gate-based high performance coplanar full adder in quantum-dot cellular automata. International Journal of Information Technology, 13(3), 1165--1177.

Angizi, Shaahin, & Khoshavi, Navid, & Marshall, Andrew, & Dowben, Peter, & Fan, Deliang (2021). MeF-RAM: A New Non-Volatile Cache Memory Based on Magneto-Electric FET. ACM Transactions on Design Automation of Electronic Systems (TODAES), 27(2), 1--18.

Jiang, Honglan, & Angizi, Shaahin, & Fan, Deliang, & Han, Jie, & Liu, Leibo (2021). Non-volatile approximate arithmetic circuits using scalable hybrid spin-CMOS majority gates. IEEE Transactions on Circuits and Systems I: Regular Papers, 68(3), 1217--1230.

Angizi, Shaahin, & He, Zhezhi, & Chen, An, & Fan, Deliang (2020). Hybrid spin-CMOS polymorphic logic gate with application in in-memory computing. IEEE Transactions on Magnetics, 56(2), 1--15.

Angizi, Shaahin, & Khoshavi, Navid, & Marshall, Andrew, & Dowben, Peter, & Fan, Deliang (2020). MERAM: Non-Volatile Cache Memory Based on Magneto-Electric FETs. arXiv preprint arXiv:2009.06119,

Angizi, Shaahin, & Fahmi, Naima Ahmed, & Zhang, Wei, & Fan, Deliang (2020). PANDA: Processing-in-MRAM Accelerated De Bruijn Graph based DNA Assembly. arXiv preprint arXiv:2008.06177,

He, Zhezhi, & Yang, Li, & Angizi, Shaahin, & Rakin, Adnan Siraj, & Fan, Deliang (2020). Sparse bd-net: A multiplication-less dnn with sparse binarized depth-wise separable convolution. ACM Journal on Emerging Technologies in Computing Systems (JETC), 16(2), 1--24.

Angizi, Shaahin, & Fan, Deliang (2019). Accelerating bulk bit-wise X (N) OR operation in processing-in-DRAM platform. arXiv preprint arXiv:1904.05782,

Roohi, Arman, & Sheikhfaal, Shadi, & Angizi, Shaahin, & Fan, Deliang, & DeMara, Ronald F (2019). Apgan: Approximate gan for robust low energy learning from imprecise components. IEEE Transactions on Computers, 69(3), 349--360.

Angizi, Shaahin, & He, Zhezhi, & Awad, Amro, & Fan, Deliang (2019). MRIMA: An MRAM-based in-memory accelerator. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(5), 1123--1136.

Khademolhosseini, Hossein, & Angizi, Shaahin, & Nemati, Yaser (2018). A fault-tolerant design for 3-input majority gate in quantum-dot cellular automata. Journal of Nanoelectronics and Optoelectronics, 13(1), 93--103.

Azimi, Saeid, & Angizi, Shaahin, & Moaiyeri, Mohammad Hossein (2018). Efficient and robust SRAM cell design based on quantum-dot cellular automata. ECS Journal of Solid State Science and Technology, 7(3), Q38.

He, Zhezhi, & Zhang, Yang, & Angizi, Shaahin, & Gong, Boqing, & Fan, Deliang (2018). Exploring a SOT-MRAM based in-memory computing for data processing. IEEE Transactions on Multi-Scale Computing Systems, 4(4), 676--685.

Parveen, Farhana, & Angizi, Shaahin, & He, Zhezhi, & Fan, Deliang (2018). IMCS2: Novel device-to-architecture co-design for low-power in-memory computing platform using coterminous spin switch. IEEE Transactions on Magnetics, 54(7), 1--14.

Parveen, Farhana, & Angizi, Shaahin, & Fan, Deliang (2018). Imflexcom: Energy efficient in-memory flexible computing using dual-mode sot-mram. ACM Journal on Emerging Technologies in Computing Systems (JETC), 14(3), 1--18.

Angizi, Shaahin, & Jiang, Honglan, & DeMara, Ronald F, & Han, Jie, & Fan, Deliang (2018). Majority-based spin-CMOS primitives for approximate computing. IEEE Transactions on Nanotechnology, 17(4), 795--806.

Moaiyeri, Mohammad Hossein, & Sabetzadeh, Farnaz, & Angizi, Shaahin (2017). An efficient majority-based compressor for approximate computing in the nano era. Microsystem Technologies, 1--13.

He, Zhezhi, & Angizi, Shaahin, & Fan, Deliang (2017). Current-induced dynamics of multiple skyrmions with domain-wall pair and skyrmion-based majority gate design. IEEE Magnetics Letters, 8, 1--5.

Angizi, Shaahin, & He, Zhezhi, & Bagherzadeh, Nader, & Fan, Deliang (2017). Design and evaluation of a spintronic in-memory processing platform for nonvolatile data encryption. IEEE transactions on computer-aided design of integrated circuits and systems, 37(9), 1788--1801.

Taherkhani, Elham, & Moaiyeri, Mohammad Hossein, & Angizi, Shaahin (2017). Design of an ultra-efficient reversible full adder-subtractor in quantum-dot cellular automata. Optik, 142, 557--563.

Khosroshahy, Milad Bagherian, & Moaiyeri, Mohammad Hossein, & Angizi, Shaahin, & Bagherzadeh, Nader, & Navi, Keivan (2017). Quantum-dot cellular automata circuits with reduced external fixed inputs. Microprocessors and microsystems, 50, 154--163.

Rouhani, Zahra, & Angizi, Shaahin, & Taheri, MohammadReza, & Navi, Keivan, & Bagherzadeh, Nader (2017). Towards approximate computing with quantum-dot cellular automata. Journal of Low Power Electronics, 13(1), 29--35.

Chabi, Amir Mokhtar, & Roohi, Arman, & Khademolhosseini, Hossein, & Sheikhfaal, Shadi, & Angizi, Shaahin, & Navi, Keivan, & DeMara, Ronald F (2017). Towards ultra-efficient QCA reversible circuits. Microprocessors and Microsystems, 49, 127--138.

Roohi, Arman, & Zand, Ramtin, & Angizi, Shaahin, & DeMara, Ronald F (2016). A parity-preserving reversible QCA gate with self-checking cascadable resiliency. IEEE Transactions on emerging topics in computing, 6(4), 450--459.

Sarmadi, Soheil, & Sayedsalehi, Samira, & Fartash, Mehdi, & Angizi, Shaahin (2016). A structured ultra-dense QCA one-bit full-adder cell. Quantum Matter, 5(1), 118--123.

Navi, Keivan, & Khammar, Saeedreza, & Angizi, Shayan, & Sheikhfaal, Shadi, & Angizi, Shaahin (2016). Excess Electron Quantum-Dot Cellular Automata Cell. Quantum Matter, 5(1), 188--190.

Ahmad, Firdous, & Bhat, Ghulam Mohiuddin, & Khademolhosseini, Hossein, & Azimi, Saeid, & Angizi, Shaahin, & Navi, Keivan (2016). Towards single layer quantum-dot cellular automata adders based on explicit interaction of cells. Journal of Computational Science, 16, 8--15.

Navi, Keivan, & Mohammadi, Hossein, & Angizi, Shaahin (2015). A novel quantum-dot cellular automata reconfigurable majority gate with 5 and 7 inputs support. Journal of Computational and Theoretical Nanoscience, 12(3), 399--406.

Angizi, Shaahin, & Danehdaran, Fahimeh, & Sarmadi, Soheil, & Sheikhfaal, Shadi, & Bagherzadeh, Nader, & Navi, Keivan (2015). An ultra-high speed and low complexity quantum-dot cellular automata full adder. Journal of Low Power Electronics, 11(2), 173--180.

Angizi, Shaahin, & Sarmadi, Soheil, & Sayedsalehi, Samira, & Navi, Keivan (2015). Design and evaluation of new majority gate-based RAM cell in quantum-dot cellular automata. Microelectronics Journal, 46(1), 43--51.

Sarmadi, Soheil, & Azimi, Saeid, & Sheikhfaal, Shadi, & Angizi, Shaahin (2015). Designing Counter Using Inherent Capability of Quantum-dot Cellular Automata Loops.. International Journal of Modern Education \& Computer Science, 7(9),

Sheikhfaal, Shadi, & Navi, Keivan, & Angizi, Shaahin, & Navin, Ahmad Habibizad (2015). Designing high speed sequential circuits by quantum-dot cellular automata: memory cell and counter study. Quantum Matter, 4(2), 190--197.

Angizi, Shaahin, & Moaiyeri, Mohammad Hossein, & Farrokhi, Shohreh, & Navi, Keivan, & Bagherzadeh, Nader (2015). Designing quantum-dot cellular automata counters with energy consumption analysis. Microprocessors and Microsystems, 39(7), 512--520.

Mohammadyan, Somaye, & Angizi, Shaahin, & Navi, Keivan (2015). New fully single layer QCA full-adder cell based on feedback model.. Int. J. High Perform. Syst. Archit., 5(4), 202--208.

Sayedsalehi, Samira, & Azghadi, Mostafa Rahimi, & Angizi, Shaahin, & Navi, Keivan (2015). Restoring and non-restoring array divider designs in quantum-dot cellular automata. Information sciences, 311, 86--101.

Chabi, Amir Mokhtar, & Sayedsalehi, Samira, & Angizi, Shaahin, & Navi, Keivan (2014). Efficient QCA exclusive-or and multiplexer circuits based on a nanoelectronic-compatible designing approach. International scholarly research notices, 2014,

Angizi, Shaahin, & Navi, Keivan, & Sayedsalehi, Samira, & Navin, Ahmad Habibizad (2014). Efficient quantum dot cellular automata memory architectures based on the new wiring approach. Journal of Computational and Theoretical Nanoscience, 11(11), 2318--2328.

Angizi, Shaahin, & Alkaldy, Esam, & Bagherzadeh, Nader, & Navi, Keivan (2014). Novel robust single layer wire crossing approach for exclusive or sum of products logic design with quantum-dot cellular automata. Journal of Low Power Electronics, 10(2), 259--271.

P-PIM: A Parallel Processing-in-DRAM Framework Enabling Row Hammer Protection
2023

SenTer: A Reconfigurable Processing-in-Sensor Architecture Enabling Efficient Ternary MLP
2023

XOR-CiM: An Efficient Computing-in-SOT-MRAM Design for Binary Neural Network Acceleration
2023

A 1.23-GHz 16-kb Programmable and Generic Processing-in-SRAM Accelerator in 65nm
2022

Design and Evaluation of a Robust Power-Efficient Ternary SRAM Cell
2022

EaseMiss: HW/SW Co-Optimization for Efficient Large Matrix-Matrix Multiply Operations
2022

Efficient Targeted Bit-Flip Attack Against the Local Binary Pattern Network
2022

FlexiDRAM: A Flexible in-DRAM Framework to Enable Parallel General-Purpose Computation
2022

Integrated Sensing and Computing using Energy-Efficient Magnetic Synapses
2022

ReD-LUT: Reconfigurable in-DRAM LUTs enabling massive parallel computation
2022

ReFACE: Efficient Design Methodology for Acceleration of Digital Filter Implementations
2022

SCiMA: A Generic Single-Cycle Compute-in-Memory Acceleration Scheme for Matrix Computations
2022

semiMul: Floating-Point Free Implementations for Efficient and Accurate Neural Network Training
2022

TizBin: A low-power image sensor with event and object detection using efficient processing-in-pixel schemes
2022

Toward a Behavioral-Level End-to-End Framework for Silicon Photonics Accelerators
2022

Toward a Behavioral-Level End-to-End Framework for Silicon Photonics Accelerators
2022

Work-in-progress: A processing-in-pixel accelerator based on multi-level HfO x ReRAM
2022

Max-PIM: Fast and Efficient Max/Min Searching in DRAM
2021

PIM-Quantifier: A Processing-in-Memory Platform for mRNA Quantification
2021

RNSiM: Efficient Deep Neural Network Accelerator Using Residue Number Systems
2021

A flexible processing-in-memory accelerator for dynamic channel-adaptive deep neural networks
2020

Exploring dna alignment-in-memory leveraging emerging sot-mram
2020

Modeling and benchmarking computing-in-memory for design space exploration
2020

PIM-Aligner: A Processing-in-MRAM Platform for Biological Sequence Alignment
2020

Processing-in-Memory Accelerator for Dynamic Neural Network with Run-Time Tuning of Accuracy, Power and Latency
2020

Aligns: A processing-in-memory accelerator for dna short read alignment leveraging sot-mram
2019

Deep Neural Network Acceleration in Non-Volatile Memory: A Digital Approach
2019

Graphide: A graph processing accelerator leveraging in-dram-computing
2019

GraphS: A graph processing accelerator leveraging SOT-MRAM
2019

Parapim: a parallel processing-in-memory accelerator for binary-weight deep neural networks
2019

Processing-in-memory acceleration of convolutional neural networks for energy-effciency, and power-intermittency resilience
2019

Redram: A reconfigurable processing-in-dram platform for accelerating bulk bit-wise operations
2019

Accelerating low bit-width deep convolution neural network in MRAM
2018

BD-NET: a multiplication-Less DNN with binarized depthwise separable convolution
2018

Cmp-pim: an energy-efficient comparator-based processing-in-memory neural network accelerator
2018

Dima: a depthwise cnn in-memory accelerator
2018

Hielm: Highly flexible in-memory computing using stt mram
2018

IMCE: Energy-efficient bit-wise in-memory convolution engine for deep neural network
2018

Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks
2018

PIM-TGAN: A processing-in-memory accelerator for ternary generative adversarial networks
2018

PIMA-logic: A novel processing-in-memory architecture for highly flexible and energy-efficient logic computation
2018

Composite spintronic accuracy-configurable adder for low power digital signal processing
2017

Energy efficient in-memory binary deep neural network accelerator with dual-mode SOT-MRAM
2017

Energy efficient in-memory computing platform based on 4-terminal spin Hall effect-driven domain wall motion devices
2017

Exploring STT-MRAM based in-memory computing paradigm with application of image edge extraction
2017

High performance and energy-efficient in-memory computing architecture based on sot-mram
2017

Hybrid polymorphic logic gate with 5-terminal magnetic domain wall motion device
2017

IMC: Energy-Efficient In-Memory Convolver for Accelerating Binarized Deep Neural Network
2017

In-memory computing with spintronic devices
2017

Leveraging dual-mode magnetic crossbar for ultra-low energy in-memory data encryption
2017

Leveraging Spintronic Devices for Ultra-Low Power In-Memory Computing: Logic and Neural Network
2017

Low power in-memory computing based on dual-mode SOT-MRAM
2017

Rimpa: A new reconfigurable dual-mode in-memory processing architecture with spin hall effect-driven domain wall motion device
2017

Cost-efficient QCA reversible combinational circuits based on a new reversible gate
2015

Designing nanoelectronic-compatible 8-bit square root circuit by quantum-dot cellular automata
2015